Which statement describes what happens on a TLB miss in hardware-assisted paging?

• A. A TLB miss triggers an immediate halt in the processor.
• B. A TLB miss triggers a page walk where the MMU/OS traverses the page table to obtain the mapping.
• C. A TLB miss causes the previous instruction to re-execute.
• D. A TLB miss triggers a page walk where the MMU/OS traverses the page table to obtain the mapping and updates the TLB; may incur memory access latency.

Answer: (D)