Which statement correctly describes how logical addresses are mapped to physical addresses in a system that uses paging or segmentation?

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Multiple Choice

Which statement correctly describes how logical addresses are mapped to physical addresses in a system that uses paging or segmentation?

Explanation:
Translating a program’s addresses from logical to physical memory relies on a memory management mechanism that uses either paging or segmentation, with hardware involvement to keep the process fast and safe. In paging, a logical address is split into a page number and an offset; a page table tells the system which physical frame holds that page, and the Memory Management Unit uses this information to form the actual physical address. In segmentation, a segment selector points to a segment descriptor that provides a base address and limit, and the MMU uses that to compute the physical address. In modern systems, hardware support, such as the MMU and a TLB cache of translations, makes this process efficient. That’s why the best description is that logical to physical mapping is done using page tables or segmentation, typically with hardware support. The other options either rely solely on software translation, rely on the TLB alone (which is just a fast cache, not the translation mechanism), or are too narrow by mentioning only page tables without acknowledging segmentation.

Translating a program’s addresses from logical to physical memory relies on a memory management mechanism that uses either paging or segmentation, with hardware involvement to keep the process fast and safe. In paging, a logical address is split into a page number and an offset; a page table tells the system which physical frame holds that page, and the Memory Management Unit uses this information to form the actual physical address. In segmentation, a segment selector points to a segment descriptor that provides a base address and limit, and the MMU uses that to compute the physical address. In modern systems, hardware support, such as the MMU and a TLB cache of translations, makes this process efficient.

That’s why the best description is that logical to physical mapping is done using page tables or segmentation, typically with hardware support. The other options either rely solely on software translation, rely on the TLB alone (which is just a fast cache, not the translation mechanism), or are too narrow by mentioning only page tables without acknowledging segmentation.

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