Which statement accurately describes the interrupt vector table and how the OS manages interrupt priorities (including priority levels, APICs, and nested/masked interrupts)?

• A. All interrupts are handled with the same priority; there is no nesting or masking.
• B. The vector table stores process IDs for scheduling.
• C. The OS may use interrupt priority levels or APIC; nested or masked interrupts manage priority.
• D. The vector table maps memory addresses for I/O devices.

Answer: (C)

The concept being tested is how interrupts are organized and serviced: there is a dedicated table that maps each interrupt to the code that should run, and the system uses priorities and masking to control which interrupts can interrupt others. The interrupt vector table (often realized as an IDT on x86 or a similar structure in other architectures) stores the addresses of the interrupt service routines. When a device signals an interrupt, the CPU uses the interrupt number to jump to the corresponding handler, so this table is all about routing to the right piece of code.

Beyond routing, the OS can assign priority levels to interrupts and use a Programmable Interrupt Controller (APIC) to enforce them. Higher-priority interrupts can preempt lower-priority ones, which enables nesting: a high-priority interrupt can interrupt a handler that was started for a lower-priority interrupt. Masking is the mechanism that temporarily blocks certain interrupts (by software or hardware settings) to protect critical sections or prevent interference while a high-priority task is being completed. In modern systems, Local APICs and I/O APICs coordinate to deliver and prioritize interrupts across multiple cores, supporting both nesting and masking to keep the system responsive and correct under load.

Remember, the vector table stores addresses of interrupt handlers, not process IDs or device memory maps, and interrupts do not all share the same priority.