What is the role of the TLB and what happens on a TLB miss?

• A. TLB caches data values from memory.
• B. The TLB caches recent virtual-to-physical translations; a miss triggers a page-table walk by the OS, loads the translation into the TLB, and retries the memory access.
• C. TLB caches disk blocks.
• D. TLB caches file system metadata.

Answer: (B)

The TLB caches recent virtual-to-physical address translations so the memory management unit can translate addresses quickly without walking the page table every time. When a virtual address is referenced, the MMU first checks the TLB. If the translation is present, the physical frame number is used and memory access proceeds fast. If the translation is not in the TLB (a miss), the system must perform a page-table walk to obtain the translation from memory, load that translation into the TLB, and then retry the memory access. If the page is not present in memory, a page fault occurs and the OS brings it in before retrying. The TLB is about speeding up address translations, not caching data values, disk blocks, or file system metadata.