How does memory protection isolate processes in a modern OS?

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Multiple Choice

How does memory protection isolate processes in a modern OS?

Explanation:
Protecting each process relies on hardware-assisted memory protection that the CPU’s memory management unit enforces for every memory access. In a modern OS, each process works in its own virtual address space, and the MMU translates those virtual addresses to physical ones using page tables (or similar structures). Each page has its own set of permissions—read, write, execute—and a present bit. The MMU checks these permissions on every access and raises a fault if a process tries to read or write memory it isn’t allowed to, or if the page isn’t currently mapped. This is what creates isolation between processes. To keep translations fast, the most recently used virtual-to-physical mappings are cached in the TLB, and these cached entries carry the same protection information. So a memory access is quickly checked for both the correct address and the appropriate permissions. When a context switch occurs, the system ensures that stale translations aren’t used for the new process, typically by invalidating or flushing relevant TLB entries. Base/limit registers are a simpler form of protection (often associated with segmentation), and some older or specialized systems use segmentation alone. However, modern systems primarily rely on paging with per-page protections because it provides finer-grained and more flexible isolation.

Protecting each process relies on hardware-assisted memory protection that the CPU’s memory management unit enforces for every memory access. In a modern OS, each process works in its own virtual address space, and the MMU translates those virtual addresses to physical ones using page tables (or similar structures). Each page has its own set of permissions—read, write, execute—and a present bit. The MMU checks these permissions on every access and raises a fault if a process tries to read or write memory it isn’t allowed to, or if the page isn’t currently mapped. This is what creates isolation between processes.

To keep translations fast, the most recently used virtual-to-physical mappings are cached in the TLB, and these cached entries carry the same protection information. So a memory access is quickly checked for both the correct address and the appropriate permissions. When a context switch occurs, the system ensures that stale translations aren’t used for the new process, typically by invalidating or flushing relevant TLB entries.

Base/limit registers are a simpler form of protection (often associated with segmentation), and some older or specialized systems use segmentation alone. However, modern systems primarily rely on paging with per-page protections because it provides finer-grained and more flexible isolation.

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