During the Fetch phase of FDE, which sequence occurs?

• A. The program counter value is copied to the MAR; the MAR value is copied to the MDR; the program counter is incremented to the next instruction.
• B. The MDR is sent to memory, then PC reset.
• C. The instruction is decoded after fetching.
• D. The ALU performs the operation.

Answer: (A)

During the fetch phase, the processor prepares to read the next instruction from memory and get ready to execute it. The program counter holds the address of that next instruction, so the first micro-operation is to copy the PC value into the memory address register (MAR). The memory is then accessed and the instruction data at that address moves into the memory data register (MDR). Finally, the PC is incremented so it points to the following instruction in memory. This sequence—PC to MAR, memory data loaded into MDR, then PC incremented—captures the core fetch steps and matches how the hardware organizes the flow: address setup, data retrieval, and progression to the next instruction.

The other options don’t fit the fetch phase. Writing MDR back to memory is not part of fetch; fetch reads memory into MDR rather than sending MDR to memory, and resetting the PC isn’t part of a normal fetch cycle. Decoding happens after fetch, in the Decode phase, and the ALU operations occur in the Execute phase, not during fetch.